Digital Logic Design (DLD)
Learn Digital Logic Design from basics to advanced, covering number systems, Boolean algebra, logic gates, Karnaugh maps, and combinational and sequential circuits to design efficient, reliable digital systems.
| # | Title | Description | Learning |
|---|---|---|---|
| 1 | Logic Gates | Introduction about logic gates and its different types. Introduction about common logic gates like AND, OR, NOT, NAND, NOR, XOR, and XNOR. | |
| 2 | AND Gate | Outputs will be HIGH only when all inputs are HIGH. This logic-gate performs logical multiplication in combinational logic circuits.. | |
| 3 | OR Gate | It produces a HIGH output when any input is HIGH. It performs logical addition in combinational logic circuits. | |
| 4 | NOT Gate | It converts HIGH to LOW and LOW to HIGH. It also called Invertor | |
| 5 | NAND Gate | The NAND gate is the inverse of the AND gate and outputs LOW only when all inputs are HIGH. | |
| 6 | NOR Gate | The NOR gate is the inverse of the OR gate and produces HIGH only when all inputs are LOW. | |
| 7 | XOR Gate | Output will be 1, if number of 1's in inputs are ODD. | |
| 8 | XNOR Gate | The XNOR gate is the inverse of the XOR gate. | |
| 9 | Universal Gates | NAND and NOR Gates Universality | |
| 10 | K-Map (2 Variables) | Karnaugh Mapping for Boolean expression having 2 variables | |
| 11 | K-Map (3 Variables) | Karnaugh Mapping for Boolean expression having 3 variables | |
| 12 | K-Map (4 Variables) | Karnaugh Mapping for Boolean expression having 4 variables | |
| 13 | Half Adders | Half Adder will add minimum and maximum of 2 bits | |
| 14 | Full Adders | Full Adder will add minimum and maximum of 3 bits | |
| 15 | Multiplexers | Multiplexer (MUX) is a combinational circuit used to select one input from multiple inputs and forward it to a single output | |
| 16 | Multiplexers 2x1 | This type of MUX will select one input from two inputs and forward it to a single output | |
| 17 | Multiplexers 8x1 | This type of MUX will select one input from eight inputs and forward it to a single output | |
| 18 | Multiplexers 16x1 | This type of MUX will select one input from sixteen inputs and forward it to a single output | |
| 19 | De-Multiplexers | De-Multiplexers | |
| 20 | De-Multiplexers 1x2 | This type of DeMUX will distribute one input to two outputs | |
| 21 | De-Multiplexers 1x8 | This type of DeMUX will distribute one input to eight outputs | |
| 22 | De-Multiplexers 1x16 | This type of DeMUX will distribute one input to sixteen outputs | |
| 23 | Encoder and Decoder - Introduction | Introduction to Encoder and Decoder including basic concepts, properties, and comparison | |
| 24 | Encoder (2 to 1 line) and Decoder (1 to 2 lines) | Basic implementation of 2-to-1 line Encoder and 1-to-2 lines Decoder with truth table and Boolean expressions | |
| 25 | Encoder (4 to 2 lines) and Decoder (2 to 4 lines) | Basic implementation of 4-to-2 lines Encoder and 2-to-4 lines Decoder with truth table and Boolean expressions | |
| 26 | Encoder (8 to 3 lines) and Decoder (3 to 8 lines) | Basic implementation of 8-to-3 lines Encoder and 3-to-8 lines Decoder with truth table and Boolean expressions |